I am professor in computer science at the Institut des Sciences et des Techniques de Valenciennes (Valenciennes - France).
My research activities are done at LAMIH
- "Syst�mes d'information, d'Aide � la D�cision et Embarqu�s" (SIADE),
"Information, Decision Making & Embedded Systems" Research group,
CNRS UMR 850.
I am also with INRIA-Lille DaRT Project and member of High Performance and Embedded Architecture and Compilation (HiPEAC) , the European Network of Excellence FP7-ICT programme.
Organization committee - Rapid Simulation and Performance Evaluation: Methods and Tools(RAPIDO�10) (Pisa, Italy, France, January 24, 2010)
Submission deadline: Nov 2, 2009. In conjunction with the 5th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC) NoE-FP7.
Organizing General Co-Chair (with Pr. Henri Basson, Universit� du Littoral C�te d'Opale, France) -
13th EUROMICRO Conference on Digital System Design (DSD) and 36th
EUROMICRO Conference on Software Engineering and Advanced Applications
(SEAA) 2010 Lille, France. CFP coming soon.